半导体行业职位招聘表.doc 42页

'JobTitlePriorityJobDescriptionSalaryBudgetRecruitingStatusVacancyOwnerSalesDirector,GCSetTopBoxHighJobDuties:Responsibleforoverseeingthesaleofall   "sSetTopBoxproductssalesinGreaterChinaregion.Developssalesstrategies,AccountManagementandPlanningandforcastssalesvolumesforallSetTopBoxproductsinGCregion.LiaizewithSetTopBoxBUtoformandimplementGCsalesstrategy.Manageagroupof7KeyAccountManagersinGCareaandisresponsibleforallsalesandprofitabilityachievementinthisregion.Qualifications:(Education,Experience,etc.) BSEngineeringandabovehave8-10+yearsofSTBsalesand/ormarketingexperienceinGCareaandisveryfamiliarwithChineseKeySetTopBoxaccounts.PreviousengagementwithSARFTand/orChineseOperatorisamajorplus.Mustdemonstratesuccessfultrackrecordsandcanshowwaystobring    tomarketsharenumber1inChina.100kopen1DirectorofEngineeringHighJustificationofapplication:ShanghaiDTV-SOCfront-endteamneedsaleaderduetotherecentorganizationchange.Theoriginaldorectorofthedepartmentispromotedtonewposition.JobDuties:ResponsibleforallaspectsofSOCdigitaldesign,includingmicroarchitecture,logicdesign,synthesis,andverification.Provideleadershiptoagrowinggroupof20-30engineersandengineeringmanagers.Leadtheteamtodevelopmultipleproductsthroughallstagesofthedevelopmentprocess.Continuouslyimprovemethodologies,processesandprocedures.Qualifications:MSEEand8+yearsexperienceinsemiconductordesignmanagement,atleast2yearsatdirectorlevelforagroupof15orgreater.Demonstratedsuccessindeliveringproductsinatimelyfashion.Resultsorientedwithgoodprocessmanagement.Workingknowledgeofindustrystandardlogicdesignandverification.UnderstandingofDigitalTVcontrollerchips.40kopen1ASICP&REngineerHighJobDescription:Inthisroleyouwillberesponsibleforchip/blocklevelfloorplanning,powerplanning,timing-drivenplaceandroute,congestionanalysisandrepair,clocktreesynthesis,timingclosureandphysicalverification(DRC/LVS).Performcircuitcustomlayoutdesignandpowerplanning.职位要求：JobRequirement:1.ExperienceinASICphysicaldesign(placeandroute,DRC/LVS,powerdistribution,etc.)2.BefamiliarwithPRtoolssuchasSOCE/Austra.3.Befamiliarwithchiptapeoutflow.4.Experiencedincircuitcustomlayoutdesign.5.BS/MSdegreeinElectricalEngineering,orsciencerelatedsubject. 6.Goodcommunicationandteamworkskills.N/Aopen242/42 SoftwareManagerHigh•Objective: LookforSoftwareManagerforSoftwareConfigurationManagementandProjectManagement•Justificationofapplication: DTVsoftwareconfigurationmanagementincludingsoftwarereleasecontrol,DevTestandprojectmanagement•JobDuties: SCMwillberesponsibleforestablishingtheconfigurationmanagementenvironment,softwarereleasecontrol,versioncontrol,buildautomation,softwaredevelopmenttest,Wikiservermaintenanceandprojectsmanagementetc.SCMalsoneedsexcellentcommunicationandbusinessprocessmanagementskillswithexpertiseinmanagingprojectschedule,softwarereleaseprocess,applicationdevelopments,deploymentsandconfiguringdevelopmenttools(JIRA,SVN,Coverity,FishEye)etc.Qualifications:(Education,Experience,etc.) •MSinCS/EEwith5+yearsexperienceinITorsoftwareapplicationdevelopmentorprojectmanagement.ExperienceworkingunderLinuxsystemandextensivelyfamiliarwithconfigurationmanagementdisciplines•ExperienceinApplicationDevelopmentusingaformalmethodologyprocessandexperiencewithsoftwarereleasecontrolanddevelopmenttest•Experienceintestingmethodologyandfamiliarwiththeclearboxtesting •ExperienceinProjectManagementusingMSprojecttoolstotrackprojectschedule,monitorthecriticalpathandtakeproperactionstopreventscheduledelay•ExperiencewithmanagetheLinuxserversandnetworksetupandwritingBatchfilesorscripts(MSBatchfiles,Linuxshellscripts,Python,Lua)toperformautomationandconsistencyExperiencewithDTVorMultimediasoftwaredevelopment,sourcecodecontrolsystems,bugtrackingtoolsandstaticcodeanalysis –SVN,JIRA,CoverityarebigplusN/open1ConnectedTVSoftwareManagerHighJobDuties:ProvidingarchitecturalandtechnicalguidancetoconnectedTVSWdevelopment.BuildingandleadingSWteamtoco-workwithinternalandexternalteam.DeliverhighqualityandcompellingconnectedTVSWproducts.Researchnewconnectedtechnology.Qualifications:(Education,Experience,etc.)1.5+Yearssoftwarearchitectureandengineeringrequired.2.2+Yearsprojectmanagementexperiencerequired,includingexperiencemanagingdevelopmentteams.3.B.SORM.Sincomputerscience,engineering,telecommunicationorequivalent.4.StrongexperienceinsoftwaredevelopmentusingC/C++.5.Workexperienceonembeddedsoftware,TVorSTBdevelopmentexperiencepreferred.6.WorkexperienceonsecuritymoduleforTV/STB.7.Strongabilityofcommunication,goodEnglishskillsinwritingandreading.8.Ahighdegreeofresponsibilityandteamspirit,willingtoacceptthechallengingwork,timelyandefficientcompletionoftasks.open142/42 ATETestEngineeringManagerHighJobDescription：ResponsibleformanagingagroupofTE’stoprovidecost-effectiveandhighcoverageATEtestsolutionformultimediaSOCproducts.Developteststrategyandplansformanufacturing,qualification,andcharacterization.ImplementATEhardwareandprogramasplan.InterfacewithShanghaionsitedevelopmentfunctionssuchasmarketing,design,DFT,validation,systemandproductengineeringonnewproductdevelopmentandproductionrelease. Providetechnicalsupport,mentoringandtrainingforjuniorengineers.DrivetestengineeringbestpracticeswithinthePEandTEgroup.Definedevelopmentschedule,trackingandreportingprogresstoProductandTestEngineeringdirector. Qualifications: B.S.orM.SdegreeinElectricalEngineeringwith6-10yearsofexperienceinTestEngineering.ExperiencewithVerigy93KATE,PinScaleandmixed-signalinstrumentationdesired.C/C++programmingskillsrequired.Verilog/VHDLexperienceisaplus.ExperiencewithDFT,SCAN,BISTandDFMmethodology.ExperiencewithtestdevelopmentforARM,DSP,memory,PLL,ADC,DAC,andinterfacesuchasUSBandDDRaplus.Excellentcoachingandpeoplemanagementskills.GoodverbalandwrittencommunicationskillsinEnglishandMandarin.open1Sr.SCM(softwareconfigurationmanagement)EngineerHighJobDuties:SCMwillberesponsibleforestablishingtheconfigurationmanagementenvironment,softwarereleasecontrol,versioncontrol,buildautomation,DevTest,Wikiservermaintenanceandprojectsmanagementetc.SCMalsoneedsexcellentcommunicationandbusinessprocessmanagementskillswithexpertiseinsoftwarereleaseprocess,applicationdevelopments,deploymentsandconfiguringdevelopmenttools(JIRA,SVN,Coverity,FishEye)etc.Qualifications:(Education,Experience,etc.)1.BS/MS inCS/EEwith3+yearsexperienceinITorsoftwareapplicationdevelopmentorprojectmanagement.ExperienceworkingunderLinuxsystemandextensivelyfamiliarwithconfigurationmanagementdisciplines.2.ExperienceinApplicationDevelopmentusingaformalmethodologyprocessandexperiencewithsoftwarereleasecontrolanddevelopmenttest.3.ExperiencewithmanagetheLinuxserversandnetworksetupandwritingBatchfilesorscripts(MSBatchfiles,Linuxshellscripts,Python,Lua)toincreaseautomationandconsistency.4.Experiencewithsourcecontrolsystems,bugtrackingtoolsandstaticcodeanalysis-SVN,JIRA,Coverity.open2EmbeddedSoftwareEngineerHighJobDuties:Writeand/orreviewfunctionalspecifications;ImplementSoftwarecomponentsbasedonspecification;Developalgorithms;Define,implementandcarry-outtests;Releasesoftwaremodulesasrequiredbyprojecttargetsandschedule;Contributetoconfigurationmanagement,buildmanagementandsoftwarequalityassurancetasks;Createandmaintaininternaldocuments;Reviewandhandlechangerequest;Assistapplication/customersupportgroupwithcustomerintegrationandsolvingfiledissues;Pointoutissuesandpotentialimprovementsinthesoftwarearchitecture,developmentmethodsandtools. Qualifications:(Education,Experience,etc.) 3+yearssoftwaredevelopmentexperience;Experiencedwithdesign,developmentandtestofembeddedsoftware;Hardwareoriented,familiarwithdigitalsignalprocessingandDSPequipment;ExperiencewithC/C++;Demodulatorknowledgeisaplus;Enthusiasticandhands-onattitude,keentolearn;Self-driven,capabletoworkautonomously;Goodteamspirit;GoodcommandofEnglish(writingandspeaking);M.Sc.levelbyeducationorbyexperience.open242/42 SWEngineer_graphicsMidJobDuties: DoC-modeling,testplanandhardwareverificationoftheassignedgraphicsblocks. Qualifications:(Education,Experience,etc.) 1.Education:Masterdegreeorabove,majorinCS,EE,orrelated. 2.Experience:Experienceon3Dgraphicsdriver,and/or3Dgraphicsapplication.3.Knowledgeof/SkillsandAbilities Befamiliarwithhardwarec-modeling; GoodskillinC/C++coding; Knowledgeofcomputergraphics,OpenGL,and/orother3Dstandards; Knowledgeofcomputerarchitectureandlogicdesignisgoodplus.NAopen1Senior/StaffSoftwareEngineerMidRequiredExperienceandEducation:• BSorMSinComputerScienceorrelatedfieldwith3+yearspracticalexperiencewithsoftwaredevelopmentandprocessspecificallyfordevicedriversandsoftwareapplicationdevelopmentinLinuxenvironments.MinimumRequirements:•Thoroughunderstandingandpracticeintheuseofobject-orienteddesignpatternsandlanguages.•Goodunderstandingofalgorithms,datastructures,andperformanceoptimizationtechniques.•WorkingexperiencewithCandC++and3yearsprogrammingofamodernprogramminglanguagehighlydesired•Excellentwrittenandverbalcommunicationskills.•Excellentanalyticalandproblemsolvingskills.•Excellentteamplayer,andproactiveandresponsiveonprojectrequest.•ThoroughknowledgeofsoftwareengineeringprinciplesandpreviousexperiencewithTVdevelopment.•ExperiencecoordinatingactivitiesbetweenHW/SWorganizationshighlydesirable.•Experiencewithsemiconductorbringupandvalidationaplus.•Experiencewithproductivitytoolsandprocessautomationinsupportofthisroleabigplus•ExperiencewithDigitalTVandtechnologiesarehighlydesirableopen5SoftwareEngineer_SWPlatformMidJobDuties: 1.BringupsystemforSDplatform. 2.DevelopandmaintaindriversforSD/HDplatform. 3.Fixbuginthesystemespeciallyrelatedtolowlayerdriver. 4.DesigncodinganddebugdriversforSTBchiponembeddedlinuxplatform,includingdemux,audio/videodecoderandsoon. 5.DevelopBSPandcodeloaderforSTBboardusingARMassemblelanguageandClanguage6.On-sitesupportourcustomersabouttheissuesofdriversandapplicationsonSTBproject Qualifications:(Education,Experience,etc.) 1.BachelororabovemajorinEEorComputer 2.FamiliarwithDVBstandards 3.HaveexperienceinembeddedsystemdevelopmentespeciallyinLinuxopen142/42 SoftwareApplicationEngineerMidJobDuties:Softwareapplication/Middleware/Firmwaredevelopmentbasedoncustomerrequirement;Addressanddebugthesoftwarebugs/issues;SupportglobalcustomersforSTBproducts;ManagethecommunicationbetweensalesandR&D. Qualifications:(Education,Experience,etc.)Bachelordegreeoraboveofthe"ComputerScience","CommunicationEngineering"or"ElectronicEngineering".Atleast1-3yearsexperienceofembeddedsoftwaresystemorSet-Top-Boxsoftwaredevelopment.BefamiliarwithMPEG&DVBprotocol.GoodatEnglishinreading,writing,speaking,passedCET-6.Goodprogrammingcapability(C,C++,assembler,etc),bettertohaveexperienceswithARM/MIPScoreproducts.Goodcommunication,teamworkspirit.Attentiontocustomerrequirementsandcapabilitytopushthesolutionacrossorganizationboundariesarerequired.open1CandySeniorDFTEngineerHighJobDuties:1.Develop,simulate,andimplementDFTdesignfornewchipsandmeetthetapeoutschedule.2.Developthehighcoverageandcosteffectivetestpatternsfortheproductiontest.3.EvaluateandestablishtheadvancedDFTtoolsandflow.Qualifications:1.BSEErequiredandMSEEpreferred.2.3+yearsofDFTorrelateddesignexperience.3.ProficientinVerilogandDFTtools.4.Capableofindependentstudy,projectmanagementandbringinnewmethodology.5.Strongcommitmenttoscheduleandworkquality.6.Goodteamworkandcommunication.15kopen2DFTManagerHighJobDuties:1.LeadaDFTteamtodefineDFTflowandbuildDFTlogicandtestpatternsforSTB/DTVproduct. 2.Alsoworkwithtestengineertobringuptestandassistfailureanalysis.Qualifications:1.BS/MESSplus6+yrworkingexperienceinDFTflowandtestlogicdevelopment2.2yrsteamleadandmanagementexperienceisrequired3.MusthavegoodknowledgeofASICdesignflowandDFTspecifictools/techniques4.ChineseandEnglishwritten&verbalcommunicationkillsimportant.open142/42 VLSIVerificationManagerlowJobDuties:Leadandmanageaverificationteamto1.PerformPre-Siliconverificationtasksforcomplex45nmMediaProcessorSOCdevices.2.Performco-verificationofprocessormodelsandRTLincludingapplicationsoftwareandfirmwareverification.3.Participateinthecontinueddevelopmentofverificationstrategies;evaluateandintegratecuttingedgeverification/emulationmethodologiesintothetoolflow.4.WorkwithothercrossfunctionalteamsinChinaandoverseatospecify,verifyandimproveSoCqualityandtimelinesstoproduction.Directpeoplemanagementofverificationteamof7-10membersandberesponsiblefor:1.Recruitment2.Teamdevelopment3.Performancemanagement4.AdministrativestaffingmattersQualifications:RequiredSkills:1.BSEEorMSEEwithaminimumof7yearsrelevantcomplexSoCdesignorverificationexperience2.Projectorteamleaderexperienceisamust;projectorpeoplemanagementexperienceof>2yearsispreferred.3.GoodEnglishandcommunicationskills;willneedfrequentcommunicationwithforeignteam.4.ExperienceforSOCdesignswithembeddedprocessorcoresandtheirintegrationwithothersystemcomponentsincludingmemorysubsystemsandperipherals.5.FamiliarwithHDLlanguages,simulationtoolsandtestbenchdesign,lowlevelassemblerlanguagesandC,orC++,scriptinglanguage6.FamiliarwithICdesign&verificationtoolflowwithhands-onexperienceinDC,PT,NC-Sim,Lintand/orLECtool.Otherskills:1.Teamwork,goodcommunicationsandopennessDemonstratedproblemsolvingskillscoupledwithattentiontodetailandenthusiasmfordebuggingbasedonarightfirsttimeapproach.pending142/42 VLSISrVerificationEngineerhighJobResponsibilities: ReportingtoVerificationmanager,thecandidateisexpectedtoberesponsibleforfollowingtasks: +ApplyspecialistskillsandknowledgeinbothhardwareandsoftwaretoperformPre-Siliconverificationtasksforcomplex45nmMediaProcessorSOCdevices +Performco-verificationofprocessormodelsandRTLincludingapplicationsoftwareandfirmwareverification +Supportthedevelopmentofmultiabstraction/viewstoenableathoroughSocverificationfromunitleveltosystemlevel +Participationinthecontinueddevelopmentofverificationstrategies;evaluateandintegratecuttingedgeverification/emulationmethodologiesintothetoolflow +WorkwithothercrossfunctionalteamsinChinaandoverseatospecify,verifyandimproveSoCqualityandtimelinesstoproduction JobRequirements: +ProficientandexperiencedwiththeC/C++program.+BachelordegreeinElectricalEngineeringorrelatedarea,MSEEispreferred. +3yearsoraboveexperienceinASIC/complexSoCdesignorverification. +ExperienceofSOCdesignswithembeddedprocessorcoresandtheirintegrationwithothersystemcomponentsincludingmemorysubsystemsandperipherals. +FamiliarwithMicroprocessorand/orDSPinstructionsetsandhowlowleveldriversoftwareintegratesintoSOCarchitecture. +FamiliarwithHDLlanguages,simulationtoolsandtestbenchdesign,lowlevelassemblerlanguagesandC,orC++,scriptinglanguages +GoodEnglishandcommunicationskills;willneedfrequentcommunicationwithforeignteam. +Experiencerelatedtovideo/audiodecoding,processtechnologyandreliabilityqualificationisaplusopen4ICLogicDesignEngineerHighJobDuties:1.IClogicdesign,verification,synthesisandtiminganalysis;2.Audio/videosubsystemintegrationandverification/emulation;Qualifications:1.MajorinEEorCS,Masterorabove;2.1~3yearsexperienceofIClogicdesign;3ormoreyearexperienceofIClogicdesignforaudio/videosystem;3.Self-motivated,goodcommunicationskills;4.Knowledgeofembeddedcpu/dsparchitecture,audio/videocodec,isaplus;5.FPGAemulationorsystemverificationexperienceisaplus;open6ICArchitectureEngineerMidJobDuties:DoC-modeling,testplanandhardwareverificationoftheassignedgraphicsblocks.Qualifications:(Education,Experience,etc.)1.Education:Masterdegreeorabove,majorinCS,EE,orrelated.2.Experience:Experienceonhardwarec-modeling,3Dgraphicsdriver,and/or3Dgraphicsapplication.3.Knowledgeof/SkillsandAbilitiesBefamiliarwithhardwarec-modeling;GoodskillinC/C++coding;Knowledgeofcomputergraphics,OpenGL,and/orother3Dstandards;Knowledgeofcomputerarchitectureandlogicdesignisgoodplus.open142/42 siliconvalidationHighJobDuties:SOC/BEsilicon/systemvalidation,responsibleforvarioussiliconproducts,includingDDR/MDMI/DTVetc,shortteamonbusinesstravelindomesticorabordisnecessary.Qualifications:(Education,Experience,etc.)BachelororEEofcomputerscience.FamiliarwithbasicSW/HWstractureofTVsystem.KnowledgeandexperienceinFPGAorotherrealtimedesignanddevelopment,knowledgeonAudio/videoencoding,suchasMPEG,AACTormp3.FamiliarwithtestanddevelopmentequipmentsuchasLA,Osciloscope.Goodteamworkspirit;self-mofivatedandabletoworkindependently/effectivelytomeettimerequinement.LinuxOSbase.GoodskillinEnglishlanguage.13kopen1louisSystemValidationSoftwareEngineerHighJobDuties:1.DevelopSWtoolforSystemValidation.2.DevelopSWtoolforChipValidation.3.DevelopSWtoolforautomatictesting.3.DebugandtraceSWorSWrelatedHWissuewhichcomesfromcustomerorinternalgroup.4.DevelopreferencesystemSWdesign.5.Shorttermonbusinesstripindomesticorabroad.Qualifications:1.AskillfulClanguageSWprogrammerandC++isaplusinbothLinuxandWindow.2.Hastheabilitytoreadanddevelopassembledcode3.BasicDTV/ATVknowledgeandbefamiliarwithMPEG2,especiallyinTS/PES/ESandwholestructure4.BefamiliarwithBorlandC++builderVC6andVisualstudio2005isaplus.5.BasicElectricalandElectronicCircuitknowledge6.Morethan3yearsprogrammingexperience7.GoodEnglishspokenandwrittenskill8.BachelorinCS/EErelatedorabove9.Goodteamwork,hastheabilitytostudy/learningnewknowledge10.Cantakeshorttermbusinesstripinbothdomesticandabroad.open1 职位1：MIPIandeDPSWdriverdevelopmentforlowpowerchipRequirements:-GoodexperienceinMIPIoreDPdriverdevelopmentinsmartphoneortabletsystem-Masterorbachelordegreemajoringinelectronicengineeringorcomputerscienceispreferred-2yearsworkingexperienceformasterdegreeor5yearsworkingexperienceforbachelordegree-StrongCand/orC++and/orASMcodinganddebuggingexpertise-Goodexperienceinembeddedsystemdevelopment-GoodChineseandEnglishcommunicationskills42/42  职位：VideoCodectechnicalmarcketing-有没有做技术想转市场的？ 集成电路IC设计/应用工程师  电子软件开发(ARM/MCU...) 职位描述:JOBRESPONSIBILITIESAsapartofVideoCodecIPDevelopmentteam,youwillberesponsiblefor:-EncoderalgorithmmodelingforH.264andHEVC,includingratecontrol,motionestimation,modedecision,etc.-Nextgenerationhighperformancevideodecoderdevelopment-Nextgenerationvideoencoderdevelopment-VideocodecIPprototypingwithFPGAEDUCATIONREQUIREMENTSB.S/M.SdegreeinComputerScienceorMicro-electronicsorequivalentsYEARSOFEXPERIENCEREQUIREMENTAbove5+yearsexperienceswhichincluding3+yearsexperienceforseniorpositionor5+yearsexperienceforstaffpositioninvideocodecorrelatedprojectsKEYKNOWLEDGE,SKILLSANDABBILITIESREQUIRED-Familiarwithvideocompression/decompressionalgorithmsandmultimediaapplications.-FamiliarwithvideocodecstandardssuchasHEVC,H.264,MPEG2,AVS,etc-SkillfulinC/C++programminglanguage.-Teamplayerandself-driven.-GoodcommandofEnglish,andgoodenoughtoattendmeetingAnyofthefollowingswillbeagoodplusandpreferred:-Familiarwithimageprocessing42/42 algorithm-RTLdesignexperience-Firmwareanddriverdevelopmentexperienceforvideocodec-SOCprojectexperience-GoodknowledgeinARMbasedembeddedsystemdesign. seniorvideocodecresearcher视频编解码算法高级研究员语音/视频开发工程师   职位描述:PositionDescription: 岗位职责： 1、视频编解码器及相关功能性能优化、代码优化 2、HEVC算法深入分析、优化 PositionRequirements: 要求： 1、计算机相关专业本科以上； 2、从事过视频编解码开发三年以上（硕士两年以上）； 3、熟悉H.264/HEVC等视频编解码算法，熟悉HEVC优先； 4、基础扎实，有一定算法开发经验。贵司有招聘需求的，欢迎和我联系；职位3这两天急的职位是这个用户体验 用户体验用研主管工作职责1.参与产品的用户研究，挖掘和分析用户的使用习惯、情感和体验需求，提炼成为产品模式和产品需求；42/42 2.持续的分析用户的特定行为和特征，建设用户角色模型，为产品运营和设计创新提供指引或依据；3.指导、评估团队的可用性工作，对问题提出修改建议，并加以改进；4.参与设计研究工作，包括用户体验设计标准的研究、影响产品用户体验的因素等。 任职要求1.希望您在用研领域的工作经验不少于2年，具备优秀、全面的用户体验实战能力；2.心理学及相关专业优先；3.对软件应用产品的交互设计、易用性研究有认识；4.掌握用户体验测试的基本方法，有参与或主导过此类研究的实践，具备基础的数据分析方法和操作技能，能完成描述性的数据统计；5.喜欢与人打交道，且关注细节，善于观察和分析用户的行为和情绪的表现细节。 职位4 ASIC数字前端设计经理（或director总监职位），其次是Asicdesignengineer，ICverificationengineer（video），ICverification（CPU）；简历发HR@hi-talent.net 1.videocodec 资深前端设计经理岗位职责:1. 负责带领设计团队将视频，图像处理和编解码算法在FPGA上高效实现；2. 负责相关IPcore的后端设计的技术支持；3. 技术团队的组织和日常管理岗位要求：1. 电子、微电子或相关专业，5年以上集成电路设计工作经验；2. 精通数字集成电路设计编程语言verilog；3. 熟悉数字前端IC设计流程；4. 熟练使用Cadence,Synopsys等相关的EDA设计工具；42/42 5. 熟悉视频编解码的技术标准6. 良好的中英文表达能力和交流能力.  2.ICverificationengineer（video） VerificationVideo职位职能:  高级硬件工程师 职位描述:Jobresponsibilities:ThecandidatewilltakepartinHEVC/H265videocodecIPdevelopmentteamasverificationplayer.Heorshewilltakepartoftheseresponsibilities:1.Co-workwitharchitectanddesignerstounderstandarchitecturespecificationandmicroarchitecturespecification.2.Extractfeaturesortestpointsfromspecificationstoworkoutdetailtestplans.3.Developverificationenvironmentandcomponents,liketestbench,models,checkers,monitorsetc.4.Discusswitharchitectanddesignerstodeveloptestcases,includingcornercases.5.Understandcmodelanddumpnecessarydataforstimulusandgoldenreference.6.Co-workwithdesignerstodebugfailedtests.7.Developandimprovescriptsforregressionsystem,flowautomationetc.8.Analyzecoverageandfilluncoveredholes.Jobrequirements:1.3+yearsexperiencewithMasterdegree,or5+yearsexperiencewithBachelordegree.2.VideocodecASICexperienceandknowledge,likeMPEG2/4,H264,etc.HEVC/H265wouldbeabigplus.3.VeteraninASICverification,especiallyinUVM/SystemVerilog/SystemCetc.4.Familiarwithscripts,likeperl/shell/MakefileandLinuxOS.5.SolidC/C++knowledgeandexperienceinmodelingwouldbeabigplus.6.Goodteamplayerandquicklearner,selfmotiveandquickproblemsolvingskills.7.FluentoralandwrittenEnglish. 3.ASICDesignIPCoreH.264MPEG职位职能:  高级硬件工程师 职位描述:Position42/42 Description:ThecandidatewillbethepartofthedesignteamforthedevelopmentofnextgenerationofvideocodecIP,theresponsibilitiesinclude:1.Micro-architecturedefinition;2.LogicimplementationwithVerilogHDL;3.Block-levelverification;4.Synthesisandpre-layout/post-layouttimingclosure;5.Poweranalysisandreduction;6.FPGAprototypinganddebugging;Qualification:7.BSwith5+yearsorMSwith2+yearsexperiencesinelectronicengineering/micro-electronics;8.Expectelf-motivationandteamplayer;9.Solidskillsandrichexperiencesinlogicdesign,synthesisandtiminganalysis;10.Hands-onengineeringexperiencesinvideocodecdevelopment,familiarwithvideocodingstandardsuchlikeH.264/AVC,MPEG-4,AVSetc.;11.Familiarwithallfront-endflowsincludingLINTcheck,simulation,synthesis,STA,formalandpoweranalysis,etc.;12.KnowledgeandexperiencesinComputerArchitectureandRISCprocessor(ARM/MIPS/SPARC)micro-architecturewouldbeagreatplus;13.FamiliarwithAXI4/AXI3protocol,memorycontrollerwouldbeaplus;14.ExperienceinFPGAprototypinganddebuggingwouldbeaplush;  4.IPcore 产品经理产品经理/主管 职位描述:基本职责：1． 负责产品的定义和市场推广2． 负责和工程团队的日常沟通以及和客户的交流工作。要求：1． 熟悉IPcore领域的产品定义，对该领域的主要公司和产品有深入的了解和研究。2． 具备一定的市场推广经验。3． 熟悉多媒体音视频领域(如H.264,H.265的算法、标准及相关概念。4． 对数字图像处理，数字视频处理有一定的了解。5． 熟悉IP 设计领域的流程，具备FPGA，芯片设计相关知识。6． 电子工程，计算机硬件等相关专业，五年以上工作经验。7． 出色的协调能力和沟通能力，英文流利。42/42  5.SeniorvideoarchitecturePositionDescription:ThevideoarchitectwillbeworkingcloselywiththealgorithmteamanddesignteamfordevelopmentofnextgenerationvideocodecIP,theresponsibilityincludes::1.WorkwithalgorithmteamtodeveloptheCModelforvideodecoder/encoderofH.265/HEVC;2.Workwithdesignteamforthemicro-architecturedefinitionofvideocodecIPforH.265/HEVC;3.DevelopvideotestingframeworkforVideocodecIPperformanceevaluation,analysisandtuning;Qualification:4.BSwith5+yearsorMS/Ph.Dwith2+yearsexperiencesinelectronicengineering/computerscience;5.Proactive,creativeandteamplayer;6.Proficientinvideoandimageprocessingtechniques,in-depthunderstandingofalgorithmandimplementationforvideocodingstandardssuchasMPEG-2,MPEG-4,H.263,H.264/AVC;7.Provenrelatedengineeringexperiencesinarchitecture/micro-architecturedefinitionforvideocodecdevelopmentwithsuccessfultape-outs/production;8.SolidprogrammingskillswithC/C++;9.Knowledge/experiencesofcomputerarchitectureisaplus; 6.(Sr.)ASICDesignVerificationEngineer PositionDescription:AspartoftheIPdesignteam,thecandidatewillberesponsibleforthepre-siliconverificationofin-housedesignedmicro-processorwhichisabuilt-incomponentfornextgenerationvideocodecIP,including:·         Buildupandmaintainverificationenvironment,includingdevelopmentoftestbenchandtestgeneratorsforblock-levelandfull-chiplevelsimulation;·         Developandexecutefunctionalverificationtestplans,includewritingtests,developingbehavioralcheckersandcoverage/codemonitors;Analyzecoveragegapsanddevisestrategiestofillcoverageholes;·         Workwithdesignerstodebugfailingtestsandresolvebugs;42/42 ·         Helpdevelopandmaintainflows/scripts/toolsforfront-enddesign/verification; Qualification:·         BSwith5+yearsorMSwith2+yearsexperiencesinelectronicengineering/micro-electronics;·         Self-motivatedteamplayer,withstrongproblemresolvingskills;·         Proficientandexperiencedinhigh-levelverificationmethodology(VMM/UVM/OVM),Verilog-HDL,andhardwareverificationlanguage(SystemC/SystemVerilog);·         Familiarwithvideocodingstandard,and/orcomputerarchitecture/micro-architecture;·         Hands-onexperiencedinCPUverification,includingtestplanandtestbenchdevelopment,testcasedevelopmentandtestcoverageassessmentwouldbeagreatplus;·         Experiencesinassemblyprogramming,andusingscriptinglanguages(Perl/Tcl/Bash/Csh)forflowautomation;·         Familiarwithfront-endASICdesignflow;  职位5JOBTITLE:Sr.PhysicalDesignEngineer DESCRIPTIONOFDUTIESINADDITIONTOTHOSEINJOBDESCRIPTION:WorkwithglobalFront-EnddesignteamandphysicaldesignteamforlargescaleASICchipphysicalimplementation.Focusonphysicaldesignofdeepsub-micronGPUchipsincludingblocklevel(fullchip)floorplanning,timingclosure,place&route,physicalverificationetc. PREFERREDEXPERIENCE:42/42 - PhDwith1+yearsofindustrialexperienceorMSEEwith3+yearsofindustrialexperienceinASICdesign- Expertiseinplaceandrouting,signalintegrity,poweranalysis,CTSdesign, DFT,designruleandconnectivityverification,timingclosure.- Successfullygonethroughcompleteproductdevelopmentcycle.Goodanalyticalanddebuggingskills- Goodlistening,writingandspeakingEnglish.- Goodcommunicationskills,stronginterpersonalskillsandtheflexibility.Dedicated,hardworkingandgoodteamplayer- FamiliarwithBack-End(physicaldesign)EDAtools(synopsys,cadence,magma)- FamiliarwithFront-EndEDAtoolsorcircuitdesignisaplus- FamiliarwithUnix/Linuxenvironmentandgoodatscripts   JobTitle:SeniorDesignEngineerforVideoCodecRoleandChance- ParticipateIPandSoClevelarchitecturedefinition,derivefunctionalanddesignspecificationsandanalyzefeasibilityoftechnicalandarchitectures.- ImplementdesignwithVerilogtoachievespecificationgoals.Simulateanddebugthecodesincodingstage.- GothroughtheFEdesignflowtodeliverqualifiednetlist.FeedbacktoPhysicalDesignteamtohelptoclosetimingandcheckfloorplan.42/42 - WriteASICspecificpartoftestplan.Co-workwithverificationengineerstoprovefunctionalcorrectnessfromblockleveltoSoClevel- SupportFW/SWbring-upanddebugging- WorkingasthetechnicalpointofcontactontheASICarea.- Maintaindesignenvironment,solveflowissues,anddevelopscriptstoimproveflowefficiency. PreferredExperience:- MajorinEE&CS- ProvenASIC/SoCDesignExperience(5+yearsasabachelor,3+yearsasamaster).- MusthavestrongbackgroundonIPdevelopment- MustbeproficientinVerilogcoding,debuggingandmodeling- MustbeskilledinASICdesignflow,suchassynthesis, DFT,timinganalysis,ECOetc.- MustbeskilledinmainstreamEDAtoolsfordesignandsimulationsuchasncsim/vcs,RC/DC,PT,Formality/LECand DFT.- MustbefamiliarwithverificationmethodologiesforfromblockleveltoSoClevel.- Shouldbefamiliarwithshell/perl/tclprogramminginLinuxOS.- ShouldbefamiliarwithP&RandManufacturetech.- GoodEnglishhearing,speaking,readingandwritingcapabilities.- Willbeabigplusifhavingmassproductiontape‐outexperience.- WillbeaplusifhavingC/C++/SystemVerilogexperience  JobTitle:42/42 SeniorDesignVerificationEngineerforVideoCodecRoleandChanceWithincreaseinASICdesigncomplexity,designverificationbecomesanimportantaspectofthedesignflow.ThecandidatewillbeworkingintheareasofhighspeedBUSdesignandverificationforSoC/IPprojects.ThispositionrequiresthecandidatetoworkcloselywiththeASICdesignersonunderstandingthefunctionalblockbeingdesigned;composetestplanandvalidationvectorstoensurefunctionalcompletenessaccordingtothedesignspecification;applymostadvancedverificationmethodologiestoDUT;writeBFMmodelandreferencemodel;anddevelopandmaintainadvancedtestenvironments. PreferredExperience:- Bachelor/MasterDegreeinElectricalorComputerEngineering.- ProvenASIC/SoCDesignVerificationExperience(5+yearsasabachelor,3+yearsasamaster).- AdvancedC/C++/SystemVerilog,RTLcodingtechniques.- PCIe,BIOS,KernelDriverexperiencewouldbeanasset.- Designforverification(assertionbaseddesignstrategies,codecoverage,functionalcoverage,testplan,gate-levelsimulation,back-annotationetc.)- Hardwareemulation,SystemPerformancemodelingandanalysis- Strongverbalandwrittencommunicationskills.- Strongproblemsolvingskills.- Abilitytobeflexibleintermsofresponsibilitiesandhours. JobTitle:PhysicalDesignEngineer(Intern)42/42  RoleandChanceWorkwithglobalFront-EnddesignteamandphysicaldesignteamforlargescaleASICchipphysicalimplementation.Focusonphysicaldesignofdeepsub-micronGPUchipsincludingblocklevel(fullchip)floorplanning,timingclosure,place&　route,physicalverificationetc. SkillandExperienceRequirements- CanguaranteefulltimeworkfromMondaytoFridayfor6months(MUST)- MasterofEE.- KnowledgeableinallaspectsofdeepsubmicronASICdesignflow- FamiliarwithBack-End(physicaldesign)EDAtools- FamiliarwithUnix/Linuxenvironmentandgoodatscripts职位6BackendLeader职位发布日期：工作所在地：上海市JobDescription:1.Leadateam:Builduphighperformancebackendteam,participateintherecruitment,setuptheobjectives,doperformancereview,supportandcoachteammembers2.Dobackendresourceallocation,andmediatesonshort-termpriorities3.Canactasprojectbackendworkpackageleader,manageworkpackageexecutionfromdefinitiontoqualificationwithinscheduleandqualitystandard4.Ensurethetechnicalleadership42/42 5.Coordinatebackendteam’sactivitywithotherteamslocallyandworldwide6.SupportqualityprocessinShanghaisiteRequirements:-B.Sc.degreeoraboveinSemiconductor,ElectronicsEngineeringareas-8yearoraboveexperienceinbackendSoCdesignwithprovenSoCtapeoutexperience-Havebackendteam/projectmanagementexperience-StrongexpertiseinSynthesis,floorplan,PnR,SI,LPdesign,CTS,poweranalysisindeepsub-macrodesign.-Strongtimingclosingandpoweroptimizationcapabilities.-Strongexperienceinsynopsys/cadencedesigntoolsandflows.-Excellentanalytical,debuggingandsolvingskill-ExperienceindatamanagementtoolssuchasDesignSyncorClearcase-ExperienceinFrontendand DFT isplus-Openmind,self-motivated,goodcommunicationskills-Goodcommunicationskill,willhavefrequentcommunicationwithforeignteams.-GoodwrittenandspokenEnglishismandatory 职位7 DIGITALDESIGNENGINEER3GMULTIMEDIA&PLATFORMS42/42  LocationShanghaiDepartmentAnalogMixedSignalfor3GMULTIMEDIA&PLATFORMS(3GP)TheBU(BusinessUnit)AnalogMixedSignalwithin3GPdevelops,producesandsellsadvanced,highlyintegratedCMOSsystemPortablePowerSolutionsforMultimedia&Platforms.Ourmaincustomersare Nokia,Samsung and SonyEricsson.TheBUhasit’sheadquarterinGrenobleandit’sdesignoperationsinGrenoble,Catania,PragueandShanghai.Currentlyitemploysabout300persons.JobSummaryAsaDigitalDesignEngineeryouarememberofoneorourPMUproductdevelopmentteams.Youwillbedevelopingdigitalcontrolcircuitsforinnovativemixedsignalhighvoltage(20V)CMOSICs.YoufulfillanimportantroleintheintegrationofthesemodulesintoPMUs(top-leveldesignandsimulations).TherolewillcoverthefullICdesigncyclefromspecificationthroughtotestingofengineeringsamples.KeyAreasofResponsibility1．Design&Development· Translatingrequirements(IP,IC)intoimplementationspecifications· DevelopmentofdigitalIP(VHDL&Verilogcoding,synthesis)andmixedsignalIP(schematiclevel)takingintoaccountallrequirements(powerusage,functionality,timing,size)· Togetherwithtestengineeringmakingthedesignsindustrialtestableaimingforpropercoverageandoptimizedtesttimes(DFT)· TakingcareofconfigurationdatamanagementonIPandIClevelandabletofulfillroleasprojectintegrator· IntegrationoftoplevelmixedsignalpowermanagementIC’s· SupportprojectteamswithdebuggingandfindingsolutionsforproductsnotperformingtospecificationbothonIPandIClevel2.Verification42/42 · Responsibleforverificationandevaluation(i.e.VerificationPlanandVerificationResults).· Analysesdesignflaws· Conductscorrectiveactions(processesPRs&CRs).3.Qualityofwork· Isresponsibleforqualityofowndesign.· Improvesdesignsovertime,byapplyinglessonslearned.· Ensurescompletenessofthe(module)documentation.· Isco-responsibleforreviewofownwork.4.Schedule&Efficiency· Definesareliablescheduleforownworkinordertosupportprojectmanagement.· Reportsprogressofownactivities.· Makesoptimallyuseofknownandverified(sub)modulesinordertoreduceprojectrisksanddevelopmenteffort.· Contributestobalancingamountofworkamongpeerdevelopers.5.Communication· Communicateswithclarity,structureandconcisenessbothverballyandinwriting6.Coaching· Coacheslessexperiencedcolleagueswhenneededoraskedfor. 7.Learning&Development(PersonalDevelopment)Maintainingcapabilities,increasingaddedvalue,enhancingdeployment.42/42 · Keepsabreastofcurrenttechnologyanddeploysnewmethodologies· Knowstechnologytrendsanddeploysthem· Searchesfornewchallengestobroadenordeepenexpertise· Improvesareasofweakness(technical,behaviors,attitudes) RequirementsBSEE/MSEE5yearsexperienceindigitaldesign- ExperiencedwithmixedsignalICdesign;- AbletobuildVerilog-AMSmodels;- Abletorunmixed-levelsimulations;- ExperiencedwithSynopsys&Cadencetoolsuite;- Ateam-workerwithapro-activeattitude;Openincommunication 职位8、PositionlocatedinShanghai: 1. CustomerProgramManagerRESPONSIBILITIES:-Determinestrategyandtacticsforexecutingproductsolutionsfrombusiness/designawardtoproduction.-Developprogramschedules,milestonesanddeliverables.-Translatecustomerrequirementsintospecifictasksforallfunctionalareasandproactivelycapture,trackanddriveallissuestoclosure.-Communicateissuestatustothecustomerandinternalteams.-Correctlyrepresenttheurgencyofissuesandescalateissuesappropriately.42/42 -Workcloselywiththehardwareandsoftwareengineeringteams,operations,FAEsandSalesteamstoresolvetechnicalandlogisticalissues.-Regularlycommunicatetheprogramstatusandkeyissuestomanagement.-Developacloseworkingrelationshipwiththecustomersdevelopmentteamandusecreativitytofindsolutionstotheirissues.-Developandmaintainpertinentmetrics/KPIsformeasuringprogramandprocesshealth/effectiveness. MINIMUMREQUIREMENTS:-5+yearsinPCorrelatedindustry-ProvenhistoryofProject/ProgramManagementofsoftwareandhardwareproducts-StrongtechnicalbackgroundandexperienceworkingwithcustomersinanOEMenvironment-Experiencemanagingglobalprojects-Excellentverbalandwrittencommunicationskills(EnglishandMandarin)-BS/MSEngineeringorComputerSciencepreferred 2. SOFTWAREQAENGINEER JobDescription/Qualifications:-Developautomationtesttool-Systemchipsetdriverstestingtoensurefunctionalityandcompatibility-Maintainandexecutedrivertestplansonadailybasis-Setupandmaintaintestsysteminfrastructures42/42  MINIMUMREQUIRMENTS:-ThecandidateshouldbeexperiencedC/C++,C#isperfect-2+yearsofplatformdriver/SystemBIOSexperience-GoodknowledgeofPCChipsetandcorelogictechnologiesaplus-Goodtroubleshootingandanalyticalskillsaplus  3. PHYSICALDESIGNENGINEER RESPONSIBILITIES:-ResponsibleforallaspectsofphysicaldesignandimplementationofGraphicsprocessors,integratedchipsetsandotherASICstargetedatthedesktop,laptop,workstation,set-topboxandhomenetworkingmarkets -Participatingintheeffortsinestablishing CAD andphysicaldesignmethodologies,flowautomation,chipfloorplan,power/clockdistribution,chipassemblyandP&R,timingclosure-Workingonstatictiminganalysis,powerandnoiseanalysisandback-endverificationacrossmultipleprojectsMINIMUMREQUIREMENTS:-BSEE,MSEEpreferred -2+yearsofexperienceinlargeVLSIphysicaldesignimplementationon0.15u,0.13u,90nm,or65nmtechnology-Successfultrackrecordofdeliveringproductstoproductionisamust. -UnderstandingofcustommacroblockssuchasRAMs,CAMs,high-speedIOdrivers-PriorexperienceinTimingclosure,clock/powerDistributionandanalysis,RCExtractionandcorrelation,placeandrouteandtapeoutissues-Workingknowledgeofdeepsub-micronroutingissuesastheyrelatetopowerandtiming -Circuitlevelcomprehensionoftimecriticalpaths,andspiceexperienceaplus-ShouldbeapoweruserofP&Randtiminganalysis CAD toolsfromSynopsys(Astro/PC/dc_shell/pt_shell/STAR-RC), CADence(FE/Nanoroute),Sequence(Physical42/42 Studio)orMagma-ProficiencyusingPerl,TCL,Scheme,Makescriptingispreferred 4. GPU-ASIC-PhysicalDesignEngineerAsaseniormemberofourASIC-PDteam,you"llbeworkingonstreamliningthechipinfrastructureprocessacrossproductdesigns,focusingonsuchtasksasclocks/timing/convergence/designfortestandscriptingofflows.You’llbefocusingonfullchiplayoutplanning(partitioning,planningclockdistributionandotherstructure,methodology),partition/fullchiptimingclosure(primetimescripts,othertools,etc)andgate-leveldesignofhigh-speedlogicRESPONSIBILITIES:-WorkinconjunctionwithPlaceandRouteEngineerstoachievetimingclosureforbothpartitionlevelandfullchiplevel-Developandenhanceentiretimingflowfrom Frontend (pre-layout)tobackend(post-layout)atbothchipandblocklevel.-Developcustomtimingscriptsusingtcl/primetimeforclockskewanalysis,specialcircuitssuchasclockdividers,corelogic<->IOmacrosinterfacessuchasPCI-E,Frame-Buffer/Memory,TMDS,etc.-ChiplevelIntegration-Developflowtophysicallypartitionandfloorplantheentirechip. -Developanddc-shellscriptsforperformingECO"s. MINIMUMREQUIREMENTS:-BSorMSinElectricalEngineeringorComputerScience -Above3yearsofrelevantASICdesignexperienceideallywithafocusintiming-ExcellentwrittenandverbalcommunicationskillsinEnglish-Abilitytomultiplexmanyissues,setpriorities,andworkinateamenvironment-Keepuptodatewithleadingedgetechnologies 42/42 5. ASICVerificationEngineer RESPONSIBILITIES:-Developandmaintainverificationenvironmentatbothfullchip&unitlevel-Developandexecuteverificationplan-DevelopBFM-Code/functionalcoverageanalysis-ResponsibleforrunningbothRTL&gatelevelsimulation MINIMUMREQUIREMENTS:-BSEE/MSEE/BSCS/MSCSwith3+yearsofexperienceindigitalcircuit/ASICverification-Possessknowledgeinatleastoneofthebelowareas· HDCP/TMDS/LVDS/DisplayPort· Blending,colorspaceconversion· Imageupanddownsampling-Strongproblemsolvingandanalyticalskills-MustbeproficientinVerilogHDL-MustbestronginPerlprogramming,orstronginPython/Rubyprogramming-Familiarwithlogicsimulatorsanddebugtools(VCS,NCSIM,Verdiandetc.)-WorkingknowledgeinC/C++,Makefile-VerilogPLIexperienceisaplus 42/42 6. ASICDFTVERIFICATIONEngineer Responsibilities:-DevelopandmaintainDFTverificationenvironmentatfullchip -DeveloptestDFTcasesandprocedure-ResponsibleforrunningbothRTL&gatelevelsimulation-GeneratetestvectorsandpostsiliconvalidationRequirements:-BSEErequired,MSEEpreferred.-2+yearsofexperienceinDFT/designfield-StronglogicDesignandverificationbackground-PossessstrongKnowledgeofDFT(scaninsertion,MBIST,JTAGandetc.)-Proficientinlogicsimulatorsanddebugtools(VCS,NCSIM,Verdiandetc.)-ProficientinVerilogHDL-StronginPerl/tcl,programming-WorkingknowledgeinC/C++,Makefile-VerilogPLIexperienceisaplus-Strongproblemsolvingandanalyticalskills 7. InfrastructureArchitect RESPONSIBILITIES:- Developthecoreinfrastructureformodeling,analysis,verificationanddebugginginthedevelopmentoflargescalegraphicschips.- Develop/maintaintheproprietaryinternaltoolsforthebuildingprocessonvariousfunctionalandperformancesimulationsoffuturechips.42/42 - Workcloselywithworldwideprojectmembersanduserstospecifysystem,createschedulesandmanageongoingfeedbackandenhancementreleases. REQUIREMENTS:- Bachelor’sdegreeinCS,EEorrelatedmajors.Solidsystemlevelknowledge.- StrongC/C++programmingability,proficientmakefiledevelopmentskills.- Strongscriptinglanguage(Perlpreferred)programmingability,wellversedindeveloping/debuggingonLinux/Unix.- Minimum2yearsexperienceinoneoftheareas:· EDA CAD.· Softwareintegration/testing/incrementalbuilding/versioncontrol.· Largescalescriptingsystemdevelopment.- Familiarwithoneversioncontroltool,perforcepreferred.- ExperienceonLinuxclusterisaplus.- ExperienceonCygwinisaplus.- Wellorganizedproblemsolvingcapabilityandcommunicationskills.- Proactive,creativeandateamplayer.- ExcellentEnglishwriting/speakingskills.  8. Graphics/ComputeArchitect 42/42 RESPONSIBILITIES:-DesignanddevelopstateoftheartGPUhardware,intheareaofgraphicsmodules,computationunits,datacommunicationunits,ormemorycontrollers-WorkingwithinateamofgraphicsarchitectsandASICengineerstodocument,design,developandverifyfunctionalandperformancemodelsforNVIDIA’snewchips.-Developtests,testplans,andtestinginfrastructuretovalidatetheperformanceandfunctionalcorrectnessofASICsmodeledinC++,RTLandrealsilicon. -Developtestsandtoolstocollectusefulinformationfor3Dgraphicsperformanceanalysis.REQUIREMENTS:-BachelorsdegreeinCS,EE,orMath.Advanceddegreesarehelpful.-Minimum2yearsexperienceinoneoftheareas:Microprocessorarchitecturedesign&development3Dgraphicsdrivers(d3dorOpenGL)developmentSystemlevelprogrammingexperienceinOS,Compiler,softwaretools,virtualmemorysystemParallelcomputing/HPCrelateddevelopment-StrongCSbackgroundwithOS,Compiler,Debuggerandsystemlevelprogramminganddebuggingskills-StrongC/C++programmingability.Scriptinglanguage(Perl,Python,Ruby)experienceisaplus,CUDAexperienceisanotherplus.-Wellorganizedproblemsolvingcapabilityandcommunicationskills-Strongsoftwaredebuggingcapabilityandexperiences-Familiarwith3DgraphicsAPIs,d3dor/andOpenGLisaplus-Proactive,creativeandateamplayer-ExcellentEnglishwritingforengineeringdocumentation,Englishoralwellenoughtoattendmeetings 42/42 9. ASICDesignEngineer RESPONSIBILITIES:- ASICDesignfordisplaysubsystem- Micro-architecturedefinition;workingcloselywithvideo/graphics/systemarchitects.- RTLdesign,verification,synthesis,timing,andsiliconbring-up. MINIMUMREQUIREMENTS:- 3+yearsexperienceinlogicdesign/verification.- MustbefamiliarwithstandardindustrialtoolslikeVCS/DC/Verdi/NCsimandetc.- Knowledgeableindesigningimagepostprocessingsystem(colorspaceconversion,up/downscaling,sharpening,de-interlacingandetc.)- KnowledgeableinstandarddisplayinterfaceslikeHDMI/LVDS/DisplayPortisaplus.- SystemVerilogexperienceisaplus.- ProgrammingskillsinCandPERLpreferred.- Goodcommunicationskillsandprovenabilitytoworkwellwithinateam.- BSinElectricalEngineering,MSpreferred. 10. OpenGLPerformanceToolsSoftwareEngineer The3DPerformanceToolsSoftwareEngineerwillhavetheprimaryresponsibilitytodesignandimplement3DgraphicsprofilinganddebuggingapplicationsforthePC,EmbeddedandMobile3Ddevelopmentcommunity.Thesuccessfulcandidatewilldevelopapplicationsthatwillassistdeveloperswithidentifyingbottlenecksandinconsistenciesintheir3DgraphicsapplicationbyexposingDriverandHardwarePerformanceCounters,andpresentingthe42/42 informationinawaycanbeunderstoodbyexternaldevelopers.Bylisteningtotheneedscomingfromthe3Dgraphicscommunity,theengineerwillprovideprofessionalsolutionstoleveloutthedifficultiesarisingfromthedevelopmentofhigh-end3Dgraphicsapplication. -5+yearsofexperienceinprogramming.2+yearsmaster,or5+yearsbachelor-Strongobjectorientedprogrammingandmethodologies.-Indepthknowledgeofatleastone3DgraphicsAPI:OpenGL,OpenGLESorDirect3D.-Strongmathematicskills.-C/C++-Experiencein3DDriverDevelopmentisabigplus 11. EmbeddedSoftwareEngineer JobDescription/Qualifications:- GoodEnglishlanguageskillstoworkeffectivelywithglobaldevelopmentandsupportteam- ExcellentCskills- Excellentdebuggingandproblemsolvingskills- ExperienceworkingonembeddedsystemsandARMprocessorspecific;- PriorexperienceinLinuxsoftwaredevelopmentisaplus;- Selfmanagingandabilitytobreakdowncomplexproblemsintomanageabletasks;- Enjoysworkingwithcustomerfromdesigntoproduction 12. CUDADevTechEngineer42/42  JobDescription/Qualifications:NVIDIAissearchingforworld-classsoftwareengineersforanexcitingroleinDeveloperTechnology.Workwiththemostexcitinghigh-performancecomputingapplications,oncutting-edgecomputationalsystems,withdevelopersthroughouttheworld.InteractcloselywiththearchitectureandsoftwareteamsatNVIDIAtoensurethebestpossibleperformanceandresults.Worktohelpinfluencethedeveloperexperiencewithcurrent-generationhardwareaswellasdeterminetrendsandfeaturesfornext-generationarchitectures.YouwillworkwiththelatestGPUtechnologyworkingwithHPC,VisualConsumer,andProfessionalapplications. ForHPCandProfessionalApplications,youwillworkonparallelizingsoftwarealgorithmsforapplicationsinavarietyoffieldsincludinggeo-sciences,medicine,computationalbiology,anddigitalcontentcreationtools. ForVisualConsumerapplications,youwillworkwithvideo,photoimaging,computervisionconsumerapplications. Animportantpartofthisrolewillbetosupport,evangelize,andinfluenceNVIDIAGPUineithergraphicsorgeneralpurposecomputingtechnologiestodevelopers.Youwilldevelopandimplementnewdata-parallelalgorithmsandsystems,createtechnicaldemos,writewhitepapersandpresentyourworkatconferences.Throughcollaborationwithexternalsoftwaredevelopers,youwillhelptooptimizetheirproductsusingNVIDIAtechnology. MINIMUMREQUIREMENTS:SkillsRequired:-StrongknowledgeofC/C++andprogrammingtechniques-Strongmathematicalfundamentals,includinglinearalgebraandnumericalmethods.-Goodcommunicationskillsrequired.42/42 -Travelforon-sitevisitswithdevelopersandtoconferenceswillberequired.-Idealcandidateswillhaveexperiencewithparallelprogramming,especiallydata-paralleland/orGPGPU.-Minimum3yearsofindustryoraCADemicexperience(orequivalent)inarelatedfield.-B.S.orhigherdegreeinComputerScience/Engineeringormathematicalfield.-ExperiencewithOpenMP,MPI,Fortran,andparallelprogrammingisaplus-ExperiencewithCUDA,DirectX,orOpenGLisaplus.-Experienceinbenchmarkingaplus-FamiliarwithCPUSystemarchitectureandOSfundamentals.-Astrongteamplayerthatisselfmotivated. 职位9、  通信系统算法工程师 SystemsEngineering--Algorithm职位描述 1. 负责设计和优化LTE/LTE-AUE物理层算法包括软硬件部分定义和定点实现。 2. 支持ASIC 硬件，DSP固件和 RF校验的设计和调试职位要求 1. 通信工程，电子工程等相关专业硕士及以上学历。 2.深入掌握数字通信，信号处理，无线通信和高级的通信技术，理论功底扎实，有独立理论分析、推导能力和创新精神。 3. 熟练掌握C、C++语言。4．熟悉LTE、LTE-A标准，有OFDM， 42/42 MIMO，均衡，信道估计，Viterbi、Turbo编译码，基站搜索，无线资源测量，时间、频率同步和干扰消除技术经验者优先。5. 具有实时信号处理经验，了解ASIC设计经验者优先6 有RF 校验和功放预失真算法经验者优先。 7. 具有较强的英文文献阅读能力，能够熟练撰写高质量的技术报告。 8. 工作态度认真踏实，具有良好的合作精神。和芯片质量工程师 (QA)岗位职责：1、引导芯片项目按照公司芯片开发或维护流程正常进行；2、监控芯片项目的执行过程以及交付输出质量；3、协助公司不断优化芯片开发和维护流程；4、使管理层在设计、开发以及其他生命周期阶段能够明了芯片开发或维护项目的质量状态；5、协助公司不断优化芯片开发和维护流程；6、参与芯片设计评审、测试、配置控制、问题报告与解决以及变更控制；7、推行能够在设计、开发以及其他生命周期阶段检测出芯片设计问题的工具；8、能够独立承担微流程开发任务。任职要求：1、通信、电子相关专业本科以上学历1~3年的硬件、芯片QA经验或硬件开发经验2、参与至少一个硬件或芯片项目完整生命周期活动3、熟悉或者了解质量管理理论，包括但不仅限于CMM流程体系，ISO质量体系等4、有通信或电子类专业方面的学习背景5、有良好的沟通能力和责任感6、有良好的的学习能力和理解能职位10、WIFIPHY软件工程师：岗位职责：负责WIFIPHYFirmware功能开发，产品化和客户支持:1.Trout2客户支持2.Shark/DolphinWIFI产品化，WIFI/BT共存性能优化3.TShark/Trout+FPGA验证，测试系统建设4.和SE一起持续改进WIFI产品的通信性能和成本42/42 招聘要求：1.了解无线通信与信号处理基本原理，熟悉GSM/TD-SCDMA/WCDMA/Wifi/LTE物理层协议者优先2.熟悉DSP汇编和C语言, 有嵌入式软件开发调试经验者优先3.积极的工作态度,善于学习，有较强的团队合作精神GPSPHY软件工程师岗位职责：负责对GPS相关芯片产品的Engine/libgps软件模块和算法的设计/开发/测试/集成/维护；1.GreenEyes产品化，灵敏度优化2.Shark/Dophin/TShark代码移植和产品化招聘要求：1.熟悉数字信号处理原理，熟悉卫星导航原理以及导航相关算法 ，有卫星导航软件/系统相关开发经验者优先；2.熟悉C语言。有嵌入式软件开发调试经验，特别是通讯物理层软件调试经验者优先；3.认真的工作态度,善于学习，有较强的团队合作精神。职位11、职位:模拟设计工程师主要职责:1、 定义、设计、开发、优化产品，并解决产品量产中工艺、封装、测试问题2、 主导新产品定义开发全过程以及产品升级3、 完善项目开发流程，维护技术文档，并优化项目定义，设计，仿真，版图等检查规范。4、 能优化实现关键性的模拟电路，如chargepump,bandgap,referencevoltage/current,OP,比较器,ADC/DAC；5、 执行晶体管级功能仿真，性能优化；6、 按照逻辑和混合信号仿真原则进行模块和芯片级的仿真；7、 实现芯片可测性设计，熟悉测试过程，并能解决实际量产测试中的问题8、 有I/O设计经验职位需求:42/42 1、至少两年以上模拟IC现实问题的经验；2、善于与同事及客户进行有效的沟通；3、熟练使用相关电脑软件，如cadence,HSPICE,SPECTRE,caliber, 数据模拟，混合信号仿真器，静态时序分析和测试向量生成；4、熟练使用Layout验证工具及调试技术；5、熟悉中成测各类测试机型及特点，能够快速完成测试调试任务 职位:设计项目经理主要职责:1、 定义、设计、开发、优化产品，并牵头解决产品量产中工艺、封装、测试问题2、 主导新产品定义开发全过程以及产品升级3、 完善项目开发流程，维护技术文档，并优化项目定义，设计，仿真，版图等检查规范。4、 能够合理制定项目计划，并按科学严谨的设计规范和流程，按时保质完成项目计划。5、 能指导初级设计师和版图工程师共同完成任务6、 能优化实现关键性的模拟电路，如chargepump,bandgap,referencevoltage/current,OP,比较器,ADC/DAC；7、 执行晶体管级功能仿真，性能优化；8、 按照逻辑和混合信号仿真原则进行模块和芯片级的仿真；9、 实现芯片可测性设计，熟悉测试过程，并能解决实际量产测试中的问题10、 有I/O设计经验职位需求:1、有丰富的解决模拟IC现实问题的经验；2、善于与同事及客户进行有效的沟通；42/42 3、熟练使用相关电脑软件，如cadence,HSPICE,SPECTRE,caliber, 数据模拟，混合信号仿真器，静态时序分析和测试向量生成；4、熟练使用Layout验证工具及调试技术；5、熟悉中成测各类测试机型及特点，能够快速完成测试调试任务 职位12、 职位职能: IC验证工程师 职位描述:Responsibilities:Responsibilitieswillincludedevelopingverificationenvironment;developingtestplansforandverifyingthefunctionofASIC;hands-onimplementationworkforeveryaspectofASICverification,workingcloselywiththesystemgroup,architects,designandverificationteams.ThesuccessfulcandidateshouldhaveexperiencegoingthroughatleastonecompleteandsuccessfulASICdesign/verificationcyclefromarchitectingandcreatingASICtestenvironmenttofullcompletionoftheverificationwork.ThecandidatealsoneedstohaveafullunderstandingofdesignusingVerilogandworkingexperiencewithSystemVerilog.AstrongcommunicationskillinbothChineseandEnglishisrequired. Qualifications:5+yearsofASICverificationexperience,complexSOCverificationexperienceispreferredStrongprogrammingskillsinSystemVerilogKnowledgeableinVerilog/Verilog-PLI/SystemC/SVA/C/C++WorkingExperiencewithUVM/OVM/VMM(atleastoneofthem)Responsibleforimplementationofverificationenvironmentandgenerationofhighqualitytestcases.BS/MSEE,CEorCS  42/42    智能手机的数字前端设计经理职位或者engineer集成电路IC设计/应用工程师 职位描述:1.Thiscandidateshouldhavemobile/highspeedinterfacebackgroundandshouldbeinterestinginR&DonVideorelatedtechnologies.2.IC/IPbackground.BeinterestingindevelopingandimprovingNewIP.3.Integrationexperience,beabletoowntestchiptapeout.4.Withatleast3-yearsIP/ProductR&Dexperience.JobDescription-RTLcoding,newlogicdesign,simulation,synthesis.-Workcloselywithalgorithmengineertodevelop/debugnewIP/product.SupportsFPGAengineerdebuggingissuesonFPGAsystem.-Workcloselywithsystem/SWengineertoverificate/validatenewIP/productonFPGA/Systemplatform.-Deliverdesign/verification/applicationdocuments.QualificationandExperience-VeryfamiliarwiththeVerilogHDLlanguage;-CreatetheRTLarchitectureforthealgorithm;-VeryfamiliarwithCandC++;-FamiliarwithFPGAtool,ModelSim,andSynplify.-FamiliarwiththeflowoftheICdesign.Requirements:-Bachelor/Masterdegreeinelectronic/computerengineering-Demonstratedabilitiesinworkingindependently-Strongcommunicationskills   智能手机高级软件工程师 职位描述:JobDescription:-MIPIandeDPSWdriverdevelopmentforlowpower42/42 chipRequirements:-GoodexperienceinMIPIoreDPdriverdevelopmentinsmartphoneortabletsystem-Masterorbachelordegreemajoringinelectronicengineeringorcomputorscienceispreferred-2yearsworkingexperienceformasterdegreeor5yearsworkingexperienceforbachelordegree-StrongCand/orC++and/orASMcodinganddebuggingexpertise-Goodexperienceinembeddedsystemdevelopment-GoodChineseandEnglishcommunicationskills职位13电力电子设计工程师-UPS/变频器/逆变器1.    电气工程、自动控制、电力电子专业毕业，本科或硕士以上学历。2.三年以上（硕士）或五年以上（本科）且有（尤其是不间断电源或电力方面）研发部门工作背景的，优先考虑。3.深刻理解并能熟练应用常用的电力电子拓扑（如buck、boost、反激等）和对应的控制策略。必须有UPS、变频器、太阳能逆变器的设计经验。4.对三相变换器常用的控制算法（如SPWM、SVPWM）有一定的理解。  有变压器电感厂3年以上实际设计开发工作经验。2、能独立完成新能源（风能，太阳能，电动汽车用）逆变器,UPS等电源使用电感变压器设计.3、熟悉变压器电感生产工艺流程,4、 了解变压器电感材料及设计选型,特别是金属磁粉芯特性,有设计BOOST,PFC,电抗器 等电感能力优先.5、 能够独立处理电子变压器及电感相关生产异常问题  1电力电子、自动化、自动控制理论等相关专业，本科以上学历，硕士优先。2、三年以上逆变器、UPS、变频器等研发工作经验，其中两年以上项目管理经验。3、熟悉逆变器软、硬件研发，能够独立负责整个项目运作。4、熟悉电源产品开发技术，能独立设计和调试电力电子电路，了解安规、EMC等各项要求。5、能独立思考、分析和解决问题，具备良好的团队领导和协作能力。       电子、自动化等相关专业，一年以上相关工作经验；掌握测试基本理论与技巧，有编写软件测试经验者优先；熟悉并网逆变器相关标准，有开关电源、UPS、并/离网逆变器、变频器测试经验者优先。42/42 职位14、云计算职位 上海和杭州北京都有  1．  对云计算云存储/HADOOP/HBASE有深入理解；2． 熟悉LINUX系统 JAVA/C++/python/bash编程；3． 熟练掌握SOCKET/TCPIP 编程， 有成熟网络通讯中间件开发经验优先；4． 熟悉大规模高性能数据处理平台设计；5． 熟悉Amazon云计算平台，对相关服务有深入研究和应用；6． 熟悉NOSQL 相关开源项目， 有实际开发经验尤佳；7． 熟悉主流网络通讯协议框架，如REST/SOAP/RPC  1、本科以上学历，5年以上开发工作经验；2、熟悉Oracle或SqlServer数据库架构，原理及其脚本编程,具备分布式存储的设计与开发能力。3、熟悉NoSQL、PostgreSQL、MongoDB等数据库，具备较强的设计与开发能力，有一定的分布式处理经验；4、具备一定的网络编程、多线程编程技术5、大型网络服务项目的分析与设计经验，知名网络公司云计算、云服务、云存储相关事业部经验；6、熟悉Amazon云存储开发，对S3有一定的研究和使用。7、工作认真负责，有团队精神，良好的沟通能力、学习能力和动手能力。职位15、1.      云计算工程师                                    上海或杭州2.      数字前端 IC设计和验证                          上海3.      数字后端 经理                                   上海4.      射频 模拟 职位RFIC 和RFFAE   上海深圳 42/42 42/42'